Speaker
Description
CMOS Monolithic Active Pixel Sensors (MAPS) have become a prominent technology choice for tracking and vertexing detectors in high-energy physics experiments over the last decades. The ALICE ITS3 project foresees the use of ultra-light MAPS, developed in the 65 nm imaging process, for the vertex detector in the ALICE experiment at the LHC to improve the vertexing performance drastically. This new process, developed by an international consortium of the ALICE ITS3 collaboration and the CERN EP R&D project, should enhance the overall MAPS performance, such as spatial & timing resolution, hit rate capability, power dissipation, radiation hardness, and large sensitive area capability.
This contribution discusses the Analogue Pixel Test Structure (APTS), a small 6x6 pixel matrix with a fast direct analogue readout of the central 4x4 pixels, and the evolution of Circuit Exploratoire 65 (CE-65v2), featuring a 1k pixel matrix with a rolling shutter analogue readout. These prototypes are used to understand the analogue properties of the TPSCo 65 nm technology and to compare the charge collection performance in different processes, pitches, pixel geometries, and collection diode arrangements.
This contribution presents recent results from lab and test beam characterisation, detailing the global and in-pixel efficiency and the spatial resolution of the APTS with different pixel geometries and pitches. A quantitative evolution of the charge collection and sharing among pixels in the CE-65v2 with the pitch and collection layer modification will be detailed. Attaining a spatial resolution better than 3 µm with a 10 µm pitch and over 99% efficiency in the moderate irradiation environment of ALICE supports the viability of using 65 nm MAPS for FCC-ee vertex detectors. This contribution will discuss the shared requirements that pave the way to implementing MAPS for the vertex detector for FCC-ee, exploiting the synergy between the ALICE ITS3 project and FCC-ee.
