Speaker
Description
In high energy physics experiments, the MRPC (Multi-Gap Resistive Plate Chamber) detectors are widely used recently which can provide higher-resolution measurement for particle identification. However, the application of MRPC detectors leads to a series of challenges in electronics design especially the accurate clock distribution with large number of front-end electronic channels over wide range. To deal with these challenges, this paper presents a universal scheme of clock transmission network for MRPC-based experiments with advantages of both precise clock distribution and global command synchronization. For precise clock distribution, the clock network is designed into a star architecture with two stages: the first one has a point-to-multipoint long range bidirectional distribution with optical channels and the second one has a fan-out structure with copper link inside readout crates. To guarantee the clock precision of frequency and phase, the PTP (Precision Time Protocol) and the DDMTD (digital Dual Mixer Time Difference) methods are used for frequency synthesis, phase measurement and adjustment, which is implemented by FPGA (Field Programmable Gate Array) in real-time. In addition, to achieve global command synchronization, based upon this clock distribution network, synchronous signals are coded with clock for transmission. With technique of encoding/decoding and clock data recovery, signals such as global triggers and system control commands, can be distributed to all front-end channels synchronously, which greatly simplifies the system design. The experimental results show that both the clock jitter (RMS) and the clock skew are less than 100 ps.
